From: Alex Williamson <alex.williamson@hp.com>
Date: Fri, 12 Oct 2007 20:49:37 +0000 (-0600)
Subject: [IA64] Fix TLB insertion for subpaging
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~14869
X-Git-Url: https://dgit.raspbian.org/%22http://www.example.com/cgi/success/%22http:/www.example.com/cgi/success?a=commitdiff_plain;h=6c20dd9c1d260a862682567ce5035f6f6a28d2bd;p=xen.git

[IA64] Fix TLB insertion for subpaging

Without this patch, Longhorn is sure to hang up.  .NET application
might hit this bug.  itc.i instruction is repeated forever, because
TLB entry with smaller page size is volatile.

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
---

diff --git a/xen/arch/ia64/vmx/vtlb.c b/xen/arch/ia64/vmx/vtlb.c
index 5680250e3d..07d840feff 100644
--- a/xen/arch/ia64/vmx/vtlb.c
+++ b/xen/arch/ia64/vmx/vtlb.c
@@ -572,13 +572,16 @@ int thash_purge_and_insert(VCPU *v, u64 pte, u64 itir, u64 ifa, int type)
         }
         else {
             u64 psr;
-            phy_pte  &= ~PAGE_FLAGS_RV_MASK;
-            psr = ia64_clear_ic();
-            ia64_itc(type + 1, ifa, phy_pte, IA64_ITIR_PS_KEY(ps, 0));
-            ia64_set_psr(psr);
-            ia64_srlz_i();
-            // ps < mrr.ps, this is not supported
-            // panic_domain(NULL, "%s: ps (%lx) < mrr.ps \n", __func__, ps);
+
+            vtlb_insert(v, pte, itir, ifa);
+            vcpu_quick_region_set(PSCBX(v, tc_regions), ifa);
+            if (!(pte & VTLB_PTE_IO)) {
+                phy_pte  &= ~PAGE_FLAGS_RV_MASK;
+                psr = ia64_clear_ic();
+                ia64_itc(type + 1, ifa, phy_pte, IA64_ITIR_PS_KEY(ps, 0));
+                ia64_set_psr(psr);
+                ia64_srlz_i();
+            }
         }
     }
     else{